eMMC support for SAMA5D27 SOM1 EK board

Introduction

This page represents a summary of tested eMMC devices with our SAMA5D27 SOM1 EK .

The eMMC are of different versions and different vendors. Our software support tries to accommodate with best effort all the possible vendors and versions, capacities that are present on the market.

Drive strength configuration

The SOM1EK board comes by default with a standard medium drive strength for the SDMMC0 lines. This means that there is a standard current consumption, EMI (ElectroMagnetic Interference), according to the datasheet, as specified in the Electric Characteristics chapter.

Because some of the eMMC boards come with adapters to SD-Cards or are soldered directly on custom PCBs, the medium default drive strength might not be enough to drive the lines from the MPU, SOM board, EK board, SD-Card slot, additional PCB and wiring, to the memory.

In this case the MPU can be configured to increase the drive strength on the lines, to ensure the signal integrity, power loss or other reasons.

Increasing drive strength also increases ElectroMagnetic Interference and current consumption

Whether or not the increase of drive strength is needed or not, depends on the adapter board. Some adapter boards have a higher capacitance. The standard imposes that the total capacitance of the Host + Device + Bus does not exceed 20 pF. If this capacitance is exceeded, higher drive strength is required in order to accommodate the loss in signal integrity.

By patching the device tree in U-boot, the user can select an overlay that will increase the drive strength and apply it over the stock device tree when booting Linux. This means that only by a single command, the drive strength can be increased or restored, at boot time.

To achieve this, the bootm command in U-boot must be altered to add the sdmmc0_hi overlay , as in the example below:

bootm 0x24000000#kernel_dtb${at91_overlays_config}#sdmmc0_hi

We provide an out-of-tree overlay for this specific purpose. The overlay needs to be applied to our dt-overlay-at91 tree. The overlay is provided on this page as a patch here
* 0001-sama5d27_som1_ek-add-overlay-for-high-drive-strength.patch: overlay for high drive strength for sdmmc0.

This overlay is not available in Linux4SAM release and also not available in any git trees that we provide. Only on this page as an attached patch.

For more information about FIT image and how to use it in U-boot, follow this link . This overlay is named sdmmc0_hi and it can be added manually per user's desire from the U-boot prompt whenever needed.

AT91Bootstrap needs to have the SDMMC0 lines configured with a high drive strength if we plan to use AT91Bootstrap to load the U-boot image from the same eMMC. AT91Bootstrap provides a board file where the PIO controller is configured for SDMMC0 and the drive strength is selected. Please take notice of the section below.

AT91Bootstrap modifications

In AT91Bootstrap, the drive strength may need modifications.

Here is an example on how to set the drive strength for the SDMMC0 pins to High. Regarding drive strength and when it's required, please check above section.

diff --git a/board/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/sama5d27_som1_ek/sama5d27_som1_ek.c
index 0297eed..7ee184a 100644
--- a/board/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -517,16 +517,16 @@ void at91_sdhc_hw_init(void)
 
 #ifdef CONFIG_SDHC0
        const struct pio_desc sdmmc_pins[] = {
-               {"SDMMC0_CK",   AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_CMD",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DEFAULT, PIO_PERIPH_A},
-               {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A},
+               {"SDMMC0_CK",   AT91C_PIN_PA(0), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_CMD",  AT91C_PIN_PA(1), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT0", AT91C_PIN_PA(2), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT1", AT91C_PIN_PA(3), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT2", AT91C_PIN_PA(4), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT3", AT91C_PIN_PA(5), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT4", AT91C_PIN_PA(6), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT5", AT91C_PIN_PA(7), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT6", AT91C_PIN_PA(8), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
+               {"SDMMC0_DAT7", AT91C_PIN_PA(9), 0, PIO_DRVSTR_HI, PIO_PERIPH_A},
                {"SDMMC0_RSTN", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A},
                {"SDMMC0_VDDSEL", AT91C_PIN_PA(11), 0, PIO_DEFAULT, PIO_PERIPH_A},
                {"SDMMC0_WP",   AT91C_PIN_PA(12), 1, PIO_DEFAULT, PIO_PERIPH_A},

Tested eMMCs

For the below memories, we test booting with AT91Bootstrap, which will auto detect the bus width (8 bit, 4 bit or 1 bit) and enable DDR if possible.

Next, we test linux to enable DDR mode if possible and display information.

We create a 100 Mbyte file and read it from the eMMC and display the required time in Linux.