Audio Clocks On SAM9X60
In current SAM9X60 design, there is no exclusive fractional PLL for audio applications. Nevertheless, we can still reconfigure PLLA in at91bootstrap to generate the audio clocks required by our audio peripherals.
In the absence of the Audio PLL, the audio peripherals use PLLA to generate the Generic clock, just like the rest of the peripherals do. This leads to imprecise clocks for the audio peripherals, which, in the end, results in clicks and pops on the audio streams. To fix this, the PLLA can be configured in the
AT91Bootstrap to generate a clock closer to (or exactly) what the audio peripherals require. Please use the attached
AT91Bootstrap GIT patches to adjust PLLA for the required audio peripheral.
For details on how to apply a git patch, please reference
git-am
The I2S patch will make PLLA generate a clock of (48 * Main Crystal Oscillator) / 2. On SAM9X60-EK there is a 24 MHz Crystal, so PLLA will generate a clock of 576 MHz. In the end, this will help provide a Generic clock of 1.536 KHz required by I2S to capture/playback a 48 KHz audio stereo stream with S16_LE format (48 * 2 * 16). For different sampling frequencies, channel number or audio format, different values are required for PLLA.
This GIT patch will change the CPU clock to 576 MHz and Master clock to 192 MHz
This patch is required only if the I2S is configured as master (generates I2SMCC_MCK, I2SMCC_CK or I2SMCC_WS)
The CLASSD patch will make PLLA generate a clock of (49 + 637,534×10³/2^22) * Main Crystal Oscillator) / 2. On SAM9X60-EK there is a 24 MHz Crystal, so PLLA will generate a clock of 588 MHz. In the end, this will help provide a Generic clock of 96 MHz, close to the CLASSD's DSP clock of 12.288 KHz (* 8) to playback a 48 KHz audio mono stream with S16_LE format. For different sampling frequencies, channel number or audio format, we will need different values for PLLA.
This GIT patch will change the CPU clock to 588 MHz and Master clock to 196 MHz
